app / stack designer
engine 0.1, data 2026.09.05-1
Stack designer
Case C-0412. Layer order, CTE staircase and per-interface stress against the 0.3 / 0.8 / 2.0 GPa thresholds. Headline numbers come from the engine; the layer table and per-interface bars are a mock layout pending the discrete stack engine.
CTE staircase
mock layout, R05 steps in proportion to 1 / MInterface stress
mock bars, GPa at dT 1 200 Kdirect joint, R04
2.92 GPa
equal CTE steps mock
1.12 GPa
minimax step stress, R05
0.63 GPa
Phi, R06
0.79
fracture margin at step 1, R18
36.7
membrane gate, R24
passes
Layers, top to bottom
mock layer table, total 3.7 µm between substrate and build| Layer | Role | t, µm | CTE | M, GPa | |
|---|---|---|---|---|---|
| Al2O3, c-plane | substrate | bulk | 7.0 | 580 | |
| MoO2 adhesion | anchor | 6.5 | 400 | ||
| Step 1, Mo 85 wt% | graded | 6.9 | 445 | ||
| Step 2, Mo 70 wt% | graded | 8.4 | 415 | ||
| Step 3, Mo 54 wt% | graded | 10.1 | 383 | ||
| Step 4, Mo 38 wt% | graded | 11.9 | 350 | ||
| Step 5, Mo 20 wt% | graded | 13.8 | 315 | ||
| Cr barrier | barrier | 6.2 | 353 | ||
| NiCr seed | seed | 13.0 | 290 | ||
| IN718, LPBF | build | bulk | 15.5 | 282 |
CTE in 1e-6 / K. M is the biaxial modulus E / (1 - nu), rule R01. Edit thickness and re-run to update G at each interface (R16).